1. Technical Field
Devices or methods consistent with the present disclosure relate to a multi-layer wiring substrate that does not include a core substrate.
2. Related Art
In recent years, the process speed of a semiconductor integrated circuit device (IC chip) used as, for example, a microprocessor of a computer has increased, and the functions thereof have been improved. As a result, the number of terminals tends to increase, and the pitch between the terminals tends to be narrowed. In general, a plurality of terminals are densely arranged in an array on the bottom of an IC chip, and the terminal group is connected to terminal group on a mother board by flip-chip bonding. However, there is a large difference between the pitch between the terminals in the terminal group of the IC chip and the pitch between the terminals in the terminal group of the mother board, and thus it is difficult to directly connect the IC chip to the mother board. Accordingly, in general, a package is used for mounting a wiring board for mounting the IC chip, and the package is mounted on the mother board.
As a wiring board for mounting the IC chip, a multi-layer wiring board is practically used that includes build-up layers formed on the front and rear surfaces of a core substrate. In the multi-layer wiring board, for example, a resin substrate (for example, a glass epoxy substrate) formed by impregnating a resin with a reinforcing fiber is used as the core substrate. A plurality of insulating layers and conductor layers are alternately formed on the front surface and the rear surface of the core substrate using the rigidity of the core substrate, and thus the build-up layers are formed. That is, in the multi-layer wiring board, the core substrate serves as a reinforcing member, and has a thickness that is considerably larger than that of the build-up layer. In addition, wiring lines (e.g., through-hole conductors) for electrically connecting each of layers in the build-up layers formed on the front surface and the rear surface are formed on the core substrate so as to pass through the core substrate.
Further, in recent years, with an increase in the process speed of a semiconductor integrated circuit device, signals in a high frequency band have been used. In this case, the wiring lines passing through the core substrate serve as large inductance, and thus the transmission loss of high-frequency signals or the malfunction of a circuit occurs, which makes it difficult to improve the process speed. In order to address this problem, a coreless wiring board without a core substrate has been proposed as the wiring board for mounting the IC chip (e.g., see Japanese Patent No. 3664720). Since the coreless wiring board does not include the core substrate having a relatively large thickness, the overall length of wiring lines is shortened. Therefore, it is possible to reduce the transmission loss of high-frequency signals and operate a semiconductor integrated circuit device at a high speed.
Also, since the coreless wiring board is manufactured without a core substrate, it is difficult to sufficiently ensure the strength of the coreless wiring board. Accordingly, in the related art, a frame is bonded to a device mounting surface for mounting an IC chip to reinforce the strength, thereby ensuring the strength of the coreless wiring board. The frame is provided at the edge of the substrate so as to surround the IC chip. In addition, Japanese Patent No. 3664720 describes that a metal plate subjected to an insulating process is adhered and fixed to a rear surface opposite to the device mounting surface, and then the coreless wiring board is interposed between the frame and the metal plate to ensure the strength of the wiring board, thereby preventing bending of the wiring board. In the coreless wiring board, a plurality of through-holes for exposing external connection terminal pads are formed in a metal reinforcing plate provided on the rear surface.
When the coreless wiring board is a pin grid array (PGA) package type, as shown in FIG. 15, PGA pads 81 are provided on the rear surface of a coreless wiring board 80, and terminal pins 82 are soldered to the PGA pads 81. Then, a reinforcing plate 85 made of a metal material is fixed in a surface contact state to the rear surface of the coreless wiring board 80 by an adhesive layer 84. Through holes 87 each having a diameter that is larger than that of a head portion 86 of the terminal pin 82 are formed in the reinforcing plate 85, and shaft portions 88 of the pin terminals 82 are inserted into the through holes 87. As such, since a plurality of through holes 87 having a relatively large diameter are formed in the reinforcing plate 85 of the coreless wiring board 80, the strength of the reinforcing plate 85 is lowered, and it is difficult to obtain a sufficient adhesive area of the reinforcing plate 85. As a result, the rigidity of the wiring board 80 is insufficient. In addition, mismatching between coefficients of thermal expansion (CTE) occurs in portions of the reinforcing plate 85 in which the through holes 87 are formed, in the rear surface of the coreless wiring board 80. As a result, the reliability of the wiring board 80 is lowered.